Abstract

Cardiovascular disease (CVD) remains a major cause of mortality, particularly among young adults, underscoring the need for real-time cardiac monitoring. This study introduces an intellectual property (IP) /application-specific integrated circuit (ASIC) design based on a deep neural network (DNN) for accurate detection of QRS complexes, which are critical for arrhythmia diagnosis. By integrating deep learning, the system improves feature extraction and classification accuracy, ensuring robust detection under diverse physiological conditions. The architecture achieves high computational efficiency through optimized parallel multipliers in the convolutional layer, thereby reducing latency and hardware resource usage. Advanced physical-design techniques, including placement optimization and clock-tree synthesis, further improve speed and power efficiency. Experimental validation using the MIT-BIH Arrhythmia Database demonstrates strong performance, with a sensitivity of 99.797% and a positive predictive value of 99.936%. Implemented on a system-on-chip field-programmable gate array (SoC FPGA), the system operates at 324 MHz with a power consumption of 0.12 W. The final ASIC design, fabricated in 45 nm CMOS technology, operates at 430 MHz while consuming only 81 µW. These results represent a significant advancement in the development of efficient, low-power wearable cardiac monitoring systems for real-time ECG analysis and arrhythmia detection.